1. Field of the Invention
The present invention relates to an analog semiconductor device having a sensor or power management function.
2. Description of the Related Art
When an analog semiconductor integrated circuit device having a sensor or power management function is constructed from MOS transistors, a plurality of threshold voltages (hereinafter, referred to as “Vth”) of MOS transistors are generally used instead of a single Vth to meet such a need as to deal with complicated analog signal processing or various input voltage levels. Such multi-Vth technique is used.
In a conventional semiconductor integrated circuit device as shown in FIG. 4, a combination of photolithography and ion implantation, by which a Vth of a MOS transistor is determined, is repeated several times to attain multiple vths (refer to Japanese Patent Application P2000-323587A (page 6, FIG. 2), for example). In FIG. 4(a) the first ion implantation 203 is carried out using photoresist 202 formed on the substrate 201 as a mask. And in FIG. 4(b) the second ion implantation 205 is carried out using photoresist 204 as a mask.
Since the conventional method requires repeating steps of photolithography and ion implantation several times for attaining the multiple Vth as shown above, there arises a problem in terms of a longer manufacturing period, which affects product delivery, and a higher manufacturing cost.